Enabling IC-Package Co-design for a Distributed Team Environment

This session introduces distributed IC-Package co-design which enables distributed IC and package teams to efficiently minimize IC and package design time and costs. It does this by the sharing of key information and functionality between the IC and package design fabrics without forcing designers to learn the other design environment tools. A key requirement is a compact definition of a die and package abstract. The abstracts contain all the necessary information to optimize the IC/package boundary and maximize routability between the fabrics. The die abstract includes information like die boundary, bumps, bump assignments, I/O drivers, RDL routes, and placement blockages from either a digital or analog chip. The package abstract contains wirebond finger and package ball information. Each tool will display the abstracts of the other dies and package. IC and package tools have been enhanced to allow edits to the abstract information from the dies and package. The package tool optimizes I/O driver placement or net assignment to bumps to enhance package routability. Inside a multi-die SiP design, the digital IC tool optimizes net assignments to the bumps of another chip placed face down on top of the die. Direct collaboration between the analog and digital design tools is also enabled. Thus, digital IC, analog IC, and package teams can make suggested changes to each other.

Take-Aways:

  • Distributed co-design enables efficient design optimization between digital IC, analog IC, and package components.

Presenter(s):

  • Thomas Whipple (Cadence Design Systems)

 

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